1. Field of the Invention
The present invention relates to a substrate and a heat sink for a semiconductor suitable for integrated circuits, and to a method of manufacturing the heat sink.
2. Description of the Related Art
Conventionally, Cu-type, Mo-type and W-type substrates have been used as heat sinks for semiconductors such as integrated circuit chips. These substrates are plated with Ni and then joined with packaging parts made of ceramics or with semiconductor elements.
Although a Cu substrate has high thermal conductivity and therefore an excellent heat radiating performance, the coefficient of thermal expansion of the Cu substrate is several times greater than that of the ceramic packaging part or semiconductor element to be joined with the substrate. Therefore, when a semiconductor element is mounted on the Cu substrate, deterioration of the brazed portion is accelerated due to distortion caused by the difference between the coefficients of thermal expansion. In contrast, W substrates and Mo substrates have relatively small coefficients of thermal expansion, so these substrates have excellent durability after being joined with semiconductor elements or ceramics parts by brazing. However, since W substrates and Mo substrates have small thermal conductivity, their heat radiating performances are insufficient.
Because of the above, there have been attempts to make composites of Cu and W or of Cu and Mo to obtain a substrate for a semiconductor which has excellent characteristics and takes advantage of the features of each respective material.
Composites of Cu and W or of Cu and Mo are made using an infiltration method, one of several powder metallurgical methods, in which Cu is infiltrated into a sintered body or a preliminary sintered body of powder of W or Mo, or by a method in which they are joined together using a clad.
However, because of insufficient dimensional accuracy, the clad method requires precise machining. Thus, joining cannot be performed with high reliability, and costs increase. Moreover, it is difficult to obtain an elongated plate by rolling a sintered ingot of W or Mo. In addition, mechanical joining with Cu is difficult because of the presence of a hard oxide film or layer. In view of the foregoing drawbacks, the infiltration method is now widely used, as described in, for example, Japanese Patent Publication Nos. 3-36304 and 3-36305, and Unexamined Japanese Patent Publication No. 6-13494.
The infiltration method, though, requires a complex process, and also requires adjustment of the density of a sintered body by shrinkage during sintering in cases where the content of Cu is not greater than 20 wt. %, because the desired density cannot be obtained in a green compact. In such cases, it is difficult to control heating conditions and to obtain a predetermined amount of shrinkage. Thus, the density and dimensions of the sintered body after shrinkage vary, affecting the coefficient of thermal expansion and thermal conductivity, and resulting in uneven quality.
Meanwhile, as the sizes of semiconductor elements and the density of integration are increased to cope with enhanced functions, the amount of heat generated by the semiconductor elements also increases. Thus, it becomes more important to release Joule heat generated in the semiconductor elements to maintain the predetermined functions. Accordingly, a substrate serving as a heat sink and having improved heat conductivity and heat radiating performance has been desired.